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placement Updates

This is to inform that Truechip Solutions Pvt. Ltd. is conducting campus drive for B.Tech- ECE & EN 2018 Batch students. The schedule of the Campus drive is given below:


Date8th June 2018, Friday
Reporting Time
VenueAn IP University College, New Delhi (to be intimated to the applicants on 6th June 2018)
Application Link Click Here
No of requirements/ vacancies 10
Position / Designation Intern for 4 - 6 Months, Design Engineer after completion of Internship
Company Profile Semiconductor Company (Core VLSI)
Company's Website http://www.truechip.net/
Is this an Expansion position or Replacement Expansion
Experience None
CTC Range (per month/ per annum) After confirmation - 4.5-5 LPA
Qualification B Tech(ECE, EEE), M Tech(ECE) 2018 Batch (No criteria in 10th, 12th and B.Tech)
Location Noida
Gender Preference (if any) No
Core Competencies: Strong Digital knowledge.
Knowledge of C/C++
Knowledge of HVL (System Verilog, Vera, Specman, E, VMM, OVM, UVM)
Simulation Tools: NCSIM/VCS/ModelSim/Questa
Testbench architecture, coding and good understanding of design issues in RTL
Area of work: Job will require IP/VIP verification for Truechip or IP/SoC verification for the customer.
Added Advantage: Knowledge of RTL coding styles
Low power verification (UPF/CPF) would be an added plus
Experience on System C would be an added plus
Worked on protocols like AMBA AHB/AXI, DDR, MIPI, PCI Express, SATA, USB
Procedure: Written Test followed by Interview Interview duration will be of 150 minutes.
Working Days 6 days in a week, Mon-Saturday during Internship 5 days in a week, Mon-Friday after confirmation
Work Timings 9:30 am - 6:30 pm